The present invention relates to an AGC circuit for burst signal in a burst signal demodulator such as voice activation, slotted aloha, TDMA, etc.
In satellite communication system such as voice transmission, a voice activation method, which operates according to a speaker's intermittent voice generation characteristic such as to transmit a signal when there is a voice and transmit no signal when there is no voice is useful for effective utility of satellite power and is extensively employed. Such signal modulation wave is an intermittently transmitted signal, i.e., a burst signal. Therefore, a burst demodulator is required on the receive side.
When the opposite station is changed, a received level in the receive side is varied with variations of the communication channel transmission loss (each station base). Generally, with received level variations the loop gain of the demodulator's carrier recovery circuit or the clock recovery circuit is varied, and a stable demodulation operation can not longer be obtained. Therefore, an AGC operation for maintaining a constant received signal level is required.
FIG. 6 shows a block diagram of a conventional AGC circuit. A quasi-synchronization 21 receives an intermittently transmitted burst modulated signal (IF input signal) for quasi-synchronization demodulation with orthogonal carrier wave signals which are substantially equal in frequency to the carrier wave frequency to obtain two quadrature channels of analog type. A/D converters 22 and 23 convert the two output signals from the quasi-synchronization demodulator 21 into respective digital data series consisting of a plurality of bits. The digital data series obtained by the A/D converters 22 and 23 are applied to a multiplier 24. The output of the multiplier 24 is supplied to a demodulator 31 using a DSP (Digital Signal Processor), and also to square circuits 25 and 26. The received signal level is obtained by squaring the respective outputs of the multiplier 24. The received signal level of the data series obtained by the squaring circuits 25 and 26 are added together in an adder 27 to obtain the received signal power of the outputs of the multiplier 24. A subtractor 28 subtracts an output signal level of the adder 27 from the reference value R1 to be set by the AGC loop. The difference value of the output of the subtractor 28 is multiplied by a multiplier 29 with a loop gain constant k which determines the AGC loop gain, and the multiplied result is applied to an integrator 30. The integrator 30 integrates the output of the multiplier 29 and drives the multiplier 24. The AGC loop is thus established in order to minimize the output value of the subtractor 28.
In the AGC loop, the AGC response time is determined by the loop gain constant k; the response time becomes shorter with the greater gain constant k and becomes longer with less loop gain constant k.
In the conventional AGC circuit for burst signal, it has been generally necessary to decrease the response time of the loop to cope with the burst signal. However, since decreasing the loop response time is equivalent to increasing the loop band, the receive level variation components that are superimposed on the received signal also pass through the loop. Such components are coupled to the received signal in the multiplier, thus deteriorating the signal quality. For this reason, there is a limit imposed on the response time for coping with the burst signal.